[PR] NEC Releases High Level Synthesis IDE, CyberWorkBench
World’s 1st Dedicated FPGA Version
Tokyo, August 25, 2011 – NEC Corporation (NEC; TSE: 6701) announced today the beginning of sales activities for CyberWorkBench’s dedicated FPGA (*1) version.
CyberWorkBench is a C-based LSI (*2) design platform developed by NEC over the course of twenty years. CyberWorkBench is developed around the “All-in-C” paradigm that allows high level synthesis (*3) and verification of any ANSI-C or SystemC program generating high quality RTL (*4). CyberWorkBench’s unique verification tools include high speed model generators, property checkers, software co-simulation environments and source code debuggers.
Although HDL is commonly used for LSI design, CyberWorkBench affordably leverages innovative technologies to generate designs 1/7 smaller than hand coded RTL, to create cycle-accurate simulation models 100 times faster than RTL simulation, and to reduce the labor cost and production time of design by several times. Sales activities begin August 25 for this ground breaking FPGA compatible technology.
FPGAs started being commercialized approximately twenty years ago. Since then, FPGA design starts have continued growing annually. Today, FPGA can be found in a wide variety of products, ranging everywhere from networking equipment to image processing media. NEC’s CyberWorkBench FPGA version supports two of the leading FPGA vendors, Altera and Xilinx.
Currently, HDL input such as VHDL and Verilog HDL are used for the majority of FPGA design, however, CyberWorkBench utilizes C-based design. Since C is widely used in software design, CyberWorkBench can convert directly into hardware design. This enables hardware to handle face recognition and high level encryption that is traditionally difficult for hardware to process. NEC expects this to result in the widespread use of FPGA applications for functions that were previously only carried out by CPU.
Key features of the CyberWorkBench FPGA version include:
1. Expanded product lineup:
NEC offers 3 new affordably priced FPGA versions, a Professional edition that supports all FPGAs, as well as Standard and Basic editions that support specific families of FPGAs.
2. Output HDL optimized for selected FPGA
CyberWorkBench’s easy to use Integrated Device Environment (IDE) automatically creates optimized circuits that consider routability, logic resources and DSP macros for the selected FPGA device.
3. Easy to use IDE and GUI with excellent documentation and training material
CyberWorkBench’s intuitive IDE and GUI allow software designers and LSI designers who are unfamiliar with C-based LSI design to quickly become productive. CyberWorkBench comes with a comprehensive set of manuals and training material that feature numerous examples for new users to quickly adapt.
CyberWorkBench is a complete High Level Synthesis design platform which generates small, low power, high speed hardware designs from software descriptions (ANSI-C, SystemC). Current CyberWorkBench users will also benefit from this dedicated FPGA version, which provides software designers with a direct path from software to hardware. Designers can also use the newly released FPGA version for fast FPGA prototyping, as CyberWorkBench provides a direct path from SW to FPGA prototyping boards.
For detailed information about CyberWorkBench, please refer to: http://www.cyberworkbench.com/
Notes:
*1) FPGA
Field Programmable Gate Array: Pre-fabricated Integrated Circuit to be configured by the designer
*2) LSI
Large Scale Integration: Electronic circuit integrated into a single package
*3) high level synthesis
This is a higher level synthesis than logic synthesis used with RTL. The synthesis features automated design flow that interprets an algorithmic description of a desired behavior and generates RTL. Examples include C synthesis, electronic system level (ESL) synthesis, algorithmic synthesis and behavioral synthesis.
*4) RTL
Register-Transfer Level: A level of abstraction used in describing digital circuits. RTL is used in hardware description languages (HDLs), such as Verilog and VHDL, to create one level circuit descriptions.
More Articles
